ADT7518
 
Rev. A | Page 17 of 40
THEORY OF OPERATION
Directly after the power-up calibration routine, the ADT7518
goes into idle mode. In this mode, the device is not performing
any measurements and is fully powered up. All four DAC
outputs are at 0 V.
To begin monitoring, write to the Control Configuration 1
register (Address 18h) and set Bit C0 = 1. The ADT7518 goes
into its power-up default measurement mode, which is round
robin. The device then to take measurements on the VDD chan-
nel, internal temperature sensor channel, external temperature
sensor channel, or AIN1 and AIN2, AIN3, and finally AIN4.
Once it finishes taking measurements on the AIN4 channel, the
device immediately loops back to start taking measurements on
the VDD channel and repeats the same cycle as before. This loop
continues until the monitoring is stopped by resetting Bit C0 of
the Control Configuration 1 register to 0. It is also possible to
continue monitoring as well as switching to single-channel
mode by writing to the Control Configuration 2 register
(Address 19h) and setting Bit C4 = 1. Further explanation of
the single-channel and round robin measurement modes is
given in later sections.
All measurement channels have averaging enabled on them on
power-up. Averaging forces the device to take an average of 16
readings before giving a final measured result. To disable aver-
aging and consequently decrease the conversion time by a factor
of 16, set Bit C5 = 1 in the Control Configuration 2 register.
There are four single-ended analog input channels on the
ADT7518: AIN1 to AIN4. AIN1 and AIN2 are multiplexed with
the external temperature sensor terminals D+ and D. Bits C1
and C2 of the Control Configuration 1 register (Address 18h)
are used to select between AIN1/AIN2 and the external
temperature sensor. The input range on the analog input
channels is dependent on whether the ADC reference used is
the internal V
REF
 or V
DD
. To meet linearity specifications, it is
recommended that the maximum V
DD
 value is 5 V. Bit C4 of the
Control Configuration 3 register is used to select between the
internal reference or VDD as the analog inputs ADC reference.
Controlling the DAC outputs can be done by writing to the
DACs MSB and LSB registers (Addresses 10h to 17h). The
power-up default setting is to have a low going pulse on the
LDAC
 pin (Pin 9) controlling the updating of the DAC outputs
from the DAC registers. Alternatively, one can configure the
updating of the DAC outputs to be controlled by means other
than the LDAC
 pin by setting Bit C3 = 1 of the Control Config-
uration 3 register (Address 1Ah). The DAC Configuration
register (Address 1Bh) and the LDAC Configuration register
(Address 1Ch) can now be used to control the DAC updating.
These two registers also control the output range of the DACs
and selecting between the internal or external reference. DAC A
and DAC B outputs can be configured to give a voltage output
proportional to the temperature of the internal and external
temperature sensors, respectively.
The dual serial interface defaults to the I
2
C protocol on power-
up. To select and lock in the SPI protocol, follow the selection
process as described in the Serial Interface Selection section.
The I
2
C protocol cannot be locked in, while the SPI protocol is
automatically locked in on selection. The interface can be
switched back to be I
2
C on selection when the device is powered
off and on. When using I
2
C, the CS pin should be tied to either
V
DD
 or GND.
There are a number of different operating modes on the
ADT7518 devices and all of them can be controlled by the
configuration registers. These features consist of enabling and
disabling interrupts, polarity of the INT/INT
 pin, enabling and
disabling the averaging on the measurement channels SMBus
timeout and software reset.
POWER-UP CALIBRATION
It is recommended that no communication to the part be ini-
tiated until approximately 5 ms after V
DD
 has settled to within
10% of its final value. It is generally accepted that most systems
take a maximum of 50 ms to power up. Power-up time is
directly related to the amount of decoupling on the voltage
supply line.
During the 5 ms after VDD has settled, the part is performing a
calibration routine. Any communication to the device during
calibration will interrupt this routine, and could cause erro-
neous temperature measurements. If it is not possible to have
V
DD
 at its nominal value by the time 50 ms has elapsed or if
communication to the device has started prior to V
DD
 settling, it
is recommended that a measurement be taken on the V
DD
 chan-
nel before a temperature measurement is taken. The VDD
measurement is used to calibrate out any temperature measure-
ment error due to different supply voltage values.
CONVERSION SPEED
The internal oscillator circuit used by the ADC has the capa-
bility to output two different clock frequencies. This means that
the ADC is capable of running at two different speeds when
doing a conversion on a measurement channel. Thus, the time
taken to perform a conversion on a channel can be reduced by
setting Bit C0 of the Control Configuration 3 register (Address
1Ah). This increases the ADC clock speed from 1.4 kHz to 22
kHz. At the higher clock speed, the analog filters on the D+ and
D input pins (external temperature sensor) are switched off.
This is why the power-up default setting is to have the ADC
working at the slow speed. The typical times for fast and slow
ADC speeds are given in the specifications.
 
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